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Registers PCI CD/CDa Configurable DMA Interface User’s Guide

28 EDT, Inc. May 2007

Command Register

Size 8-bit

I/O read-write

Address 0x00

Access PCD_CMD

Bit PCD_ Description

4–7 STAT_INT_EN A value of one enables the corresponding STAT bit to cause an interrupt when

it is asserted.

3 ENABLE Set to one to enable the PCI CD/CDa interface. This bit is set after the direction

is chosen and typically after the first DMA buffer is ready. To reset direction or

flags, toggle this bit.

To flush the DMA FIFOs, clear then set this bit.

2 DATA_INV If this bit is set, the PCI CD/CDa inverts the data.

1 FORCEBNR A value of 1indicates that the board is not ready.

0 SELRX A value of 1 indicates that data is coming in to the PCI CD/CDa.

A value of 0 indicates that data is going out from the PCI CD/CDa.

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CDA CD 60 Guide de l'utilisateur Page 32